Execute and implement automation ideas, bringing concepts into usable tools and methodologies for the team
Collaborate with frontend and backend analog designers to capture requirements, define frameworks, improve flows, and provide support and training
Design, implement, and maintain Python libraries, CLI tools, and interfaces to CAD tools (e.g., Cadence Spectre, Mentor Calibre) to automate analog design flows
Integrate with HPC schedulers and server farms (LSF) to enable scheduled runs, caching, reproducibility, and optimize throughput
Develop and integrate new methods, tools, and features into the physical design automation flow, and improve existing software modules through refactoring, testing, and maintenance
Build and maintain interfaces for job preparation, submission, monitoring, and results collection, ensuring seamless workflow execution
Create and maintain technical documentation, adhering to quality assurance processes to ensure high-quality deliverables
Your Profile
Qualifications and skills to help you succeed
A degree in Electrical Engineering, Computer Science, or Physics, with at least 7 years of experience in the semiconductor industry
EDA engineer with strong software background, specifically in Cadence EDA tool suite (Virtuoso ADE, Calibre, Spectre, etc.). Physical design knowledge is a plus
Expert-level Python programmer (7+ years) with strong software engineering fundamentals, including clean architecture, modular design, testing, and performance profiling
Experienced in Unix/Linux, data management (Perforce, Gitlab), and version control, with knowledge of software modules, object-oriented programming, and agile software development
Strong technical skills, including Cadence Skill coding, pcell coding, tcl/tk coding, and experience with electrical simulation tools (e.g. EMI, electro thermals)
Excellent problem-solving skills, with the ability to work in a dynamic environment, take leadership, and define clear architectures and requirements
Strong communication and collaboration skills, with experience working with cross-functional teams, including engineering teams and senior management, and ability to unify device modeling, application, and chip design